CV for:

Chris Hobson

22-Apr-2003 11:11

 

Employment Market:

Electronics

Employment Type:

Permanent/Contract

Availability:

25/11/02

Preferred Role:

Senior Digital ASIC Designer

Current Skill Set:

VHDL, Synopsys Synthesis, Verification,Unix Skills

Preferred Location(s):

Swindon, M4 Coridor

Position Sought:

Main Skills are Digital ASIC based, so anything along those lines would be great. I am interested in expanding my experience especially in the applications or systems areas. I am also willing to try other job roles within electronics.

Current Work Permits:

Authorised to work in the EU

Email Address:

chris@chrisnsarah.co.uk

Date of Birth:

27/08/1971

City:

Swindon

Education:

Masters Degree

Graduation Year:

1994

Driving Licence:

Yes

Curriculum Vitae

Name:- Christopher Andrew Hobson                                   Date of Birth:- 27/8/71

 

 

             

PROFILE      

           

Senior Digital Designer with 8 years experience of  design and verification of complex system on chip designs for the mobile telecommunications industry. Proven contributions to successful ASIC projects from specification through to sign off. Recent experience of commercial aspects of  selling IP including working with customers. Ability to work well as part of a team or individually as required. Not afraid to use own initiative or to involve others to get the job done. 

        

EXPERIENCE  

   

 

Oct 2001 to Nov 2002: Ericsson Technology Licensing AB.

FAE Role including technical sales support.

This role involved visiting customers across Europe to discuss how the Ericsson Bluetooth IP would integrate with potential customers SOC designs. These visits formed the core strategy of the European sales team. The role also included the generation of potential customer leads, analysis of customer requirements and feasibility studies. Performed a port of the Bluetooth IP and test environment to the ARC processor including designing an ARC to AMBA interface.
 

June 1998 to Oct 2001:  Ericsson Microelectronics

Senior Digital Design Engineer working on several Ericsson Bluetooth Baseband I.C’s.

Main responsibilities:-

Responsible for Bluetooth Core Synthesis including Test insertion, preparation of synthesis scripts for IP customer use.

Block and System level Verification mainly using Mentor Modelsim.

S.T.A. using Primetime.

Sign off responsible for processor subsystem half of the I.C.

Design database management including importing external IP, revision control, scripting, packaging and exporting Ericsson IP to external customers.  Site contact for Synopsys tools.

 


Sep 1997 to May 1998:   Rockwell Semiconductor Systems.

CMOS Digital Design Engineer.

                        Enhancement of DECT Digital Baseband I.C. Power consumption

estimation using Epic PowerMill. Verification of correct circuit

functionality using Mentor VHDL, PowerMill and Hspice.

 

Nov 1994 to Sep 1997:   GEC Plessey Semiconductors. CMOS Digital Design Engineer.

Specification and design of microprocessor peripherals for a GSM Digital Baseband Processor, using Cadence Leapfrog VHDL simulator and the Synopsys synthesis tool.

 

Microprocessor sub-system verification, using RTL VHDL and gate level Verilog simulation to run ARM code for the purpose of validating the functionality and connectivity of the design. Characterisation of first silicon to confirm functionality over speed and voltage. TQM team leader.

 

June to Oct 1994:            Scottish Hydro Electric. Software engineering, programming in C and Fortran. Digital hardware debugging and repairing remote control out stations.

 

May to Dec 1993:    Project placement with GEC Plessey Semiconductors.

 

Summer 1992:               Summer placement with GEC Plessey Semiconductors in Swindon.

 

                           

Courses attended:

 

VHDL Applications Workshop with Esperan

Synopsys Chip Design

Synopsys Primetime Training

Mentor DFT Training

C Programming with First Alternative

STA training with Synopsys

CDMA training with Southampton University

SPW training with Alta(Cadence)

GSM training with Southampton University

TQM training with GPS

PowerMill ACE Training from Epic

TCL Scripting Workshop by Esperan

Advanced CMOS and BiCMOS VLSI Design at EPFL

Introduction to DSP Techniques with Strathclyde University

Perl Programming with Esperan

 

 

 

EDUCATION

                                   

1989 -94            MEng. Hons. Electronics Engineering (2:1)  University of Edinburgh.

                                                                                                                                                                                               

Project:             "An investigation into the performance of Fractional-N frequency synthesis". This project involved both the design simulation and subsequent breadboard  construction of a system for performing fractional-N frequency synthesis.                                     

                                                                                                                                                                                               

Dissertation:       "Personal Mobile Communications"

 

 

ADDITIONAL INFORMATION:

           

Clean Driving Licence, City and Guilds  Amateur Radio Examination Certificate, Amateur Radio Licence (Class B), Founding President of Edinburgh University Amateur Radio Club, Recipient of the 1988 "Arthur Bell Outward Bound Scholarship" representing  Breadalbane Academy. Represented Edinburgh University in the 1994 Scottish Universities Curling Championships. Knowledge of C, Pascal, 68k, Arm 7 and Arm Thumb and ARC assembly languages.

 

HOBBIES AND INTERESTS:

 

Mountaineering, badminton, cycling, skiing, golf, DIY, computing, amateur radio, cinema, socialising, Motorsport, digital photography.